An Algorithm for Zero-Skew Clock Tree Routing with Bu er Insertion
نویسندگان
چکیده
We study the problem of multi-stage zero skew clock tree construction for minimizing clock phase delay and wirelength. In existing approaches clock bu ers are inserted only after clock tree is constructed. The novelty of this paper lies in simultaneously perform clock tree routing and bu er insertion. We propose a clustering-based algorithm which uses shortest delay as the cost function. We show that the feasible positions for clock tree nodes and bu ers can be generalized from diagonal segments (merging segments) to rectangles (merging blocks). Bu ers are large components and must be placed pairwise disjointly. We also show that the problem of nding legal positions for bu ers such that no bu ers overlap can be formulated as a shortest path problem on graphs, and can be solved by the Bellman-Ford algorithm. By making use of the special properties of the graphs, we further speedup the BellmanFord algorithm. The experimental results show that our algorithm greatly outperforms the approach of inserting bu ers after clock routing.
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